EEPROM is a class of nonvolatile semiconductor memory in which information may be electronically programmed into and erased from each memory element or bit cell. Each bit cell of the EEPROM comprises two metal oxide semiconductor field effect transistors (MOSFET). One of the MOSFETs has two gates and is used to store the bit information, and the other MOSFET is used in the selection of the bit cell. EEPROMs are typically realized as arrays of floating gate transistors.
An typical EEPROM bit cell includes a floating gate arranged between source and drain regions formed in a silicon substrate, and a control gate that controls the charging of the floating gate, which is arranged (isolated) to hold a charge. With no charge on the floating gate, the transistor acts normally, and a pulse on the control gate causes current to flow. When charged, it blocks the control gate action, and current does not flow. Charging is accomplished by grounding the source and drain terminals and placing sufficient voltage on a control gate tunnel through an oxide to the floating gate. A reverse voltage channeled from another transistor clears the charge by causing it to dissipate into the substrate.
Some EEPROM designs provide N-channel cells over a P-well substrate. Other designs provide P-channel cells over an N-well, which itself resides in a P-type substrate, such as disclosed in U.S. Pat. Nos. 5,986,931 and 5,790,455, EP2339585A1, and EP2267775A2, which are herein incorporated by reference in their entirety.
A double diffused metal oxide semiconductor (DMOS) is a common transistor suitable for high voltage applications. A DMOS is referred to as “double diffused” because the diffusion process involves creating both N and P doped areas. DMOS transistors typically provide a higher breakdown voltage and lower on-state resistance as compared with many other transistor types. Some DMOS structures define a lateral channel between the source and drain regions, in which the channel is located below the gate (e.g., floating gate). Performance characteristics of such DMOS cells, such as breakdown voltage and on-state resistance, are typically determined by parameters include the channel dimensions and doping characteristics.